The fascinating story of how EUV was broadly commercialized for high volume chip making will go down in history as one of the most ambitious projects undertaken by mankind. ArF 193nm immersion lithography dominates chip manufacturing today!
20 years, over $1 trillion invested, millions of people from dozens of large tech companies formed a consortium that invested heavily into 4 different integrated circuit manufacturing technologies, but Intel the 900 pound Gorilla of CPU making in the 1990's championed EUV as the chip making tech that was ultimately adopted by chip fabs online in the early 2000's & still using ASML's latest EUV machines in the newest Chip Fabs today!
Etching Masks vis Mass Printing Technology
Even more incredible than the state-of-the-art immersion lithography used to make chips, the masks that control the light pattern that etches the photopolymer, those masks started life on high volume printing press sheet etching technology used to carve the printing instructions into large thin metal sheets wrapped around the printing ink drums in web-to-web offset high volume printing machines.
Industrial IC CHIP Mass Production Now
ArF 193nm High Volume Fabs still king at production today in 10nm & 7nm flavors using ASML immersion lithography machines. While EUV 13nm mirror bounce technology gets a lot of press, its the ARF193 technology making billions of chips per year right now, and its not going away anytime soon.
State of the Art, these Intel chip fabrication facilities are operating clean rooms with billions of dollars of equipment running 24/7, so ArF argon fluoride excimer laser blasted though high precision masks & ultra precise Carl Zeise optics to steeper print chip layer patterns (chip layouts) onto photopolymers.
Emerging EUV Chip Fabs
EUV though many generations of refinement enabling the creation of many new generations of chipsets to be produced on increasingly smaller nanometer feature process nodes. Going from 130nm, then 90nm, then 65nm, & 45nm, 28nm, 14nm, 10nm, 7nm, 5nm (2024) & even for the emerging 3nm (2027), then 1.8nm (2030) then High NA 0.4 nm (2034) and 0.1nm (2037) going forward. EUV will be around making chips even as newer CHIP fabs start up with high volume chip production using High NA machines.
EUV 13nm UV Light Source
A spinoff of Intel ultimately gave rise to the creation of the needed high intensity deep ultraviolet laser technology needed to pump the EUV mirrors & masks to precision etch photo-resist layers via water in immersion lithography chip manufacturing machines made by ASML to etch trillions of transistors, capacitors, resistors & trillions of km of wiring to connect all the logic together in all the billions of chips made in high volume automated CPU, GPU, SOC, and Solid State Memory production processes.
Different chips for Different Applications
A smartphone SOC needs the most power efficient chips because the device has to operate on tiny amounts of power from small lithium polymer batteries common in consumer electronics of all kinds today.
Cars or automobiles or light duty passenger vehicles which feature more chip enabled features & functions now, like self driving modes, such that a new 2023 vehicle can have more than 130 chips onboard. Automotive chips can be less power efficient & slower performance than stuff made for bleeding edge smartphones, tablets & gaming laptops. Similarly, cheaper larger nodes make even less power efficient but very robust chips for appliances like your latest microwave oven or TV remote control or toaster oven.
Nvidia's latest Discrete GPU solution requires Bleeding Edge Chips
Especially those AI specific TESLA cards used in machine learning applications. Crypto mining makes use of bleeding edge ASIC technology. Space Satellites have to use hardened radiation resistant chips that can survive working 24/7 in extreme temperature regimes that vary considerably as they orbit into & out of the shadow of the Earth, going from cryogenic cold to bake your cookies in the oven hot as the Sun hits them without atmospheric filtering like we enjoy down here near the surface of the Earth.
Making 300mm Silicon Crystal Boules & Wafers
Ultra high purity silicon melted inside an argon purged furnace where a seed crystal slowly lowered into the 3000 C melted silicon until the molten silicon starts to deposit as a giant signal crystal boule as the seed crystal spun & extracted upward producing a giant 600KG high purity silicon boule which is later cut by a diamond coated band saw into giant 300 mm wafers that are then P N doped with ions to make the semiconductor properties needed in the final IC product. Imaging sensors called CMOS are made in the same way as computer chips, as are LED diodes & other high technology integrated circuits like ASIC used in bitcoin or cryptocurrency mining respectively.
Converting Wafers to Chips
Hundreds of processing states proceed on the wafer, mainly consisting of photoresist, a UV curing photopolymer mask applied to a spinning wafer to create a thin high uniformity layer. High-definition masks made of ultra-high precision etched nickel metal sheets with many hundreds of megapixels of detail are then used with mirrors to take the light from the UV laser source and project it onto the photoresist in a process similar to traditional chemical photography printing process to etch the mask detail into the thin layer of photoresist.
Ultra high purity water then rinses away the parts not exposed to UV, producing a single layer of detailed integrated chip information layout deigns which are layered up into over 100 layers like this such that capacitors, resistors, connector wires, and many other features are photo chemical processed into each layer with a similar number of high-definition masks containing the chip layer design information. The entire process so chemically intensive & UV intensive and high precision, that its entirely automated in the giant super complicated & very expensive ASML EUV machines.
International Information Fusion
To commercialize 300mm EUV took the investment of over a trillion dollars worldwide over the course of 10 years as the cumulative combinatory work of millions of people working for dozens of large tech companies across time & space collaborating on the most complex manufacturing process ever commercially produced for high volume production of such important products as computer chips that seem to affect most industries worldwide, noting how the COVID19 related chip shortage caused production halts in many other industries that rely on a continual supply of on-demand chips in those industries.
Sub-Nanometer Chips
Going beyond EUV to 500mm wafers in then brand new and even more expensive Chip Fabs by Intel & TSMC, will utilize the latest ASML High NA chip making lithography machines being invented & in early preproduction refinement & glitch error reduction integration testing early beta development right now in middle 2023. This less than 3nm process node FAB will start being constructed in 2024 for high volume production with good yield rates by late 2025 & onward.
Beyond High NA
E-beam, X-ray & Gamma Ray direct multi-beam parallel write will enable High K 1000mm GaN or GaAs wafers to get 250-500 layers of logic & connections & other circuit components for new chipset notes through 2035 in Sub-1nm process nodes during the post-Silicon wafer production era coming up.
Superior to silicon chips are already used in classified aerospace applications, made in small volumes or in low volume production at very high cost by defense contractors or military industrial companies who produce war technologies, and espionage technologies, and consciousness technologies used by government intelligence agencies around the world.
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